Ultra Low Power, High Performance Negative Edge Triggered ECRL Energy Recovery Sequential Elements with Power Clock Gating
نویسندگان
چکیده
منابع مشابه
Modified Double-Edge Triggered Clock Branch Sharing Architecture for Ultra Low Power Design
Power consumption plays an essential role in VLSI design. Earlier, the VLSI designers were more concentrated on performance and area, but, gradually, low power consumption became one of the most important factors in VLSI design. Increasing demand and growth of portable devices have increased the demand of power efficient VLSI circuits. In this paper, various conventional low power designs are a...
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ژورنال
عنوان ژورنال: Research Journal of Applied Sciences, Engineering and Technology
سال: 2014
ISSN: 2040-7459,2040-7467
DOI: 10.19026/rjaset.7.676